Three microcode cycles for the writeback alone. That's acceptable because segment loads are already expensive multi-cycle operations, and the designers likely expected them to be infrequent -- most programs load their segments once at startup and never touch them again. Page translations happen on every memory access, so the same approach would be ruinous. Hence the fully autonomous hardware walker.
What it did give me was a clean control-flow model and a solid latency baseline to compare against. With that in place, it was time to wire in the full pipeline.
。关于这个话题，体育直播提供了深入分析
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